1. Field of the Invention
The present invention relates to a solid-state imaging device, and particularly to a solid-state imaging device including plural horizontal charge-transfer parts.
2. Background Art
In order to meet a demand for high resolution and high performance of a digital still camera, the development for increasing the number of pixels of a solid-state imaging device and for improving various imaging characteristics has been progressed. Recently, a solid-state imaging device intended to achieve high resolution and including plural horizontal charge-transfer parts has been developed, and has been put to practical use (see, for example, JP-A-9-69620 (patent document 1)).
FIG. 6 is a schematic view for explaining a solid-state imaging device including two horizontal charge-transfer parts, and a solid-state imaging device 101 shown here includes a CCD solid-state imaging element 102 and a timing signal generation circuit 103. The CCD solid-state imaging device roughly includes an imaging part 104a, an optical black area 104b, a first horizontal charge-transfer part 105, a second horizontal charge-transfer part 106, and an output part 107.
Besides, the imaging part includes light receiving parts 108 arranged in a matrix form, and a vertical charge-transfer part 109 provided for each of vertical columns of the light receiving parts and transferring a charge from each of the light receiving parts. An inter-horizontal charge-transfer part transfer electrode (hereinafter referred to as “H-H transfer electrode”) 110 is provided between the first horizontal charge-transfer part and the second horizontal charge-transfer part.
In the solid-state imaging device constructed as stated above, vertical transfer clocks Vφ1, Vφ2, Vφ3 and Vφ4 are applied to the vertical charge-transfer parts at timings shown in FIG. 7 from the timing signal generation circuit, so that charges read from the light receiving parts into the vertical charge-transfer parts are transferred in the vertical direction. Horizontal clocks Hφ1 and Hφ2 are applied to the first horizontal charge-transfer part and the second horizontal charge-transfer part at timings shown in FIG. 7 from the timing signal generation circuit, so that charges are sequentially horizontally transferred from the first horizontal charge-transfer part and the second horizontal charge-transfer part to the output part and are outputted from the output part.
Here, in order to horizontally transfer the charges from the second horizontal charge-transfer part to the output part and to output them from the output part, it is necessary to perform transfer (hereinafter referred to as “H-H transfer”) of charges between the first horizontal charge-transfer part and the second horizontal charge-transfer part.
Hereinafter, a structure to realize the H-H transfer will be described with reference to the drawings.
That is, in order to realize the H-H transfer, first, ion implantation is performed between the first horizontal charge-transfer part and the second horizontal charge-transfer part, and as shown in FIG. 8A, which is a partial enlarged sectional view of an area indicated by character X in FIG. 6, after transfer channel areas 111 and channel stop areas 112 are formed, the H-H transfer electrode (the electrode of the first layer) is disposed on the transfer channel areas and the channel stop areas in parallel to the first horizontal charge-transfer part and the second horizontal charge-transfer part (see FIG. 8B).
Next, although a horizontal transfer electrode common to the first horizontal charge-transfer part and the second horizontal charge-transfer part is formed, since the horizontal charge-transfer part generally includes a storage part and a transfer part, horizontal transfer electrodes of two layers are formed. Specifically, as shown in FIG. 8C, a horizontal transfer electrode 113 of a second layer is formed, and subsequently, as shown in FIG. 8D, a horizontal transfer electrode 114 of a third layer is formed.
By adopting the structure as stated above, an H-H transfer clock HHGφ is applied to the H-H electrode at a timing shown in FIG. 7 from the timing signal generation circuit, and the H-H transfer clock applied to the H-H electrode is applied to the transfer channel area, so that the H-H transfer is realized.